16 Commits

Include renames

Author	SHA1	Message	Date
xushengyuan	653f246df5	gui add cmdline args	2025-05-09 23:46:41 +08:00
xushengyuan	f23b7b34e3	add vram optimization cmdline args	2025-05-09 22:47:41 +08:00
xushengyuan	56ae032172	overlapped dcae & vocoder	2025-05-09 22:26:12 +08:00
xushengyuan	054f599ebd	int4 weight only quantized model using torchao	2025-05-09 20:27:25 +08:00
dotsimulate	347c7a5e87	Fix: Ensure manual_seeds handles list and int types correctly	2025-05-09 02:31:53 -04:00
Gong Junmin	7d6d598822	Merge pull request #82 from rsxdalv/cpu-offload	2025-05-09 09:18:41 +08:00
Roberts Slisans	c6e47ae747	add cpu_offload option	2025-05-08 18:48:16 +03:00
rmcc3	546f6d72aa	Fix: Correct model checkpoint download paths (#68)	2025-05-08 07:04:31 -04:00
dotsimulate	8b062577a8	Fix: Correct save_path handling in ACEStepPipeline	2025-05-07 17:37:17 -04:00
mrfakename	5a6079e37b	Improve download handling	2025-05-07 09:26:12 -07:00
Sayo	c43997d6f4	edit readme	2025-05-08 00:03:56 +08:00
mrfakename	fc2cfa2d93	torch.cate -> torch.cat	2025-05-07 08:38:17 -07:00
mrfakename	cf6d058963	bring in latest changes	2025-05-06 21:20:25 -07:00
mrfakename	afa0332e8c	switch -> git+ url	2025-05-06 20:19:51 -07:00
mrfakename	a5746eaab6	work on pip package	2025-05-06 18:59:32 -07:00
mrfakename	54da683d36	work on pip package	2025-05-06 18:59:28 -07:00